Fixed tag... I am using a PIC18F458 and a Realtek RTL8019AS ethernet controller to make an embedded web server. I've seen a few posts about this ethernet controller in the archives, so hopefully somebody can help me understand the memory in this controller. My understanding is that there is a 16K SRAM that is accessible via remote dma. This memory is to be used to construct packets to be sent and also the controller will place received packets in this memory. The controller then uses on-chip local dma to transfer date between this SRAM and the controller's FIFO as needed when sending/receiving packets. Is this correct so far? The controller's pstart, pstop and boundary registers are used to set where the controller puts the received packers in the SRAM. Can the packets to be transmitted be constructed anywhere (minus the receive buffer area) in the SRAM? Is it possible to read any location in the SRAM with remote dma? Or can only the receive area be read? Right now I can set/read the controller registers just fine. I am attempting to verify the correctness of my remote dma routines be writing and reading from the same locations in the SRAM. Should this work? Because right now it doesn't. Also, the SRAM is only addressable in 256 byte blocks. Does this mean that I have to write a full 256 bytes for it to work, or just that if I don't use the full page, I have to start at the next blank page for the next write? I've read the Realtek datasheet, but it seems unclear on some of the details about the memory. I've also looked at the National DP83901A datasheet and related application notes. I know there is published GPL code for this chipset, but this may end up in a closed source commercial product, so I can't reference that. I think I'm near getting this controller to work, I just don't quite understand how the SRAM/remote dma works. Thanks in advance, Eric Christensen -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads