This is mostly unrelated to the previous posts on this thread, but the
question occured to me as I was reading them...

P-channel vs. N-channel FETS: given the ability of PIC output ports to drive
either a high or low logic level, to apply to the FET's gate, are there any
design considerations that should dictate choosing one over the other
(that's P vs N- channel)?  I'm thinking primarily w.r.t. power-up
conditions, polarities, etc.

Jim

> --
> http://www.piclist.com hint: The PICList is archived three different
> ways.  See http://www.piclist.com/#archives for details.
>

--
http://www.piclist.com hint: The PICList is archived three different
ways.  See http://www.piclist.com/#archives for details.