>-----Original Message-----
>From: WH Tan [mailto:whsiung@TM.NET.MY]
>Sent: 13 January 2004 14:08
>To: PICLIST@MITVMA.MIT.EDU
>Subject: [PIC]: USART question
>
>
>Hi,
>
>I had experiment with PIC's USART in recent weeks and now I
>get somthing that is working. Anyway I still have some question here.
>
>When a byte of data is received, what is the time until the
>next byte of data come in again? I am using a 9600bps
>buadrate. I asume that for a bit of data transfer, it take
>1/9600 sec. So for receive a byte of data + start/stop bits,
>it is 10/9600 sec.
>
Correct.

>Then what is the instruction cycle before next byte of data
>received. I asume an instruction cycle take 4 * 1/16MHz (I am
>using 16MHz for Fosc). So is that meant the instruction cycle
>we have to manipulate the data just received is (10/9600) /
>(1/16*10^6), or (10/9600) * 16* 10^6 ?
>
Nearly right, you correctly stated that one instruction will take 4 *
1/16MHz (0.25us). So at 9600bps you have (10/9600)/0.25us = 4166
instructions between received bytes.  In practice it's even better, the UART
has a buffer which means that it can store two bytes whilst receiving the
next one, which gives you a lot of time to service an interrupt at this bit
rate.

>Then does the BRGH setting have an effect to above calculation?
>

No, the BRGH setting affects only how you set the baud rate generator.  The
amount of instructions avaiable between bytes will be the same for any
arbitrary bit rate, irrespective of the BRGH setting.

Regards

Mike





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