> I'm confused about a circuit I've been experimenting with.  The circuit
> is at http://www.nosreme.org/tmp/timer1b.png, using a 74HC14 hex Schmitt
> trigger inverter.
>
> U1A (buffered by U1B) produces a low duty cycle square wave, which
> slowly charges C2 through D2 and R3.  So far so good.  The voltage on C2
> starts to rise with the expected exponential curve, but then stops at
> about 2.6V (Vcc is 5V from a 7805), and I don't understand why.  I would
> expect it to rise close to 5V minus a diode drop.

IF C2 is an electrolytic then it's leakage resistance will lower its maximum
voltage.

As noted by others, 74HC14 output is not guaranteed to rise to full supply,
but will often come close under no load.
You can "help" it by using a stiff (aka low value ) resistor from U1B output
to Vdd. Try 1k first, which may be too low for the IC to drive "legally"
(depending on Vdd) but will show you the best improvement you can hope for.
Then, if that result was useful, try a higher value such as 3K3 or 10k.

I would have expected the circuit to work as intended as shown. What
actually happens?

Note that the circuit has no formal reset mechanism. When power is turned
off C2 must discharge by unspecified means to allow sequence to be
restarted. In practice the IC protection / intrinsic input diodes will
probably discharge C2 when supply falls after power is removed.

If you MUST have drive signal go all the way to supply, you could drive a
transistor on with U1B, but polarity of D1 would need to be reversed.
(PNP any small signal. 10k resistor from U1B output to base, emitter to Vdd,
collector to D2 anode. Disconnect path from D2 anode to U1B out.


FWIW the value of 1K for R5 is rather low for drive purposes.
R4 can probably be a short circuit.

Something like a ?CD4060? AFAIR oscillator/divider has a 2 gate oscillator
and a 2^N divider chain that allows small timing capacitors for lonnnnnnng
delays.



        Russell McMahon

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