Marcel van Lieshout wrote:
> I have thought of that, but as there is no instruction to
> test-and-clear a variable in a single cycle a racing-condition could
> occur.

Not if you do it correctly as Dave described.  The interrupt routine only
writes the multi-byte value when the flag is 0, in which case it sets it to
1.  This happens as one atomic operation from the foreground code point of
view.  The foreground code only tries to read the bytes after verifying that
the flag is 1.  It then clears the flag *after* it has read all the bytes.

Note, however, that this cure can easily be worse than the original disease
of just disabling interrupts for 8 cycles.  In the long run, it probably
takes more cycles and code to implement.  The only advantage is if the
interrupt can't tolerate an additional 8 cycle latency or perhaps in
responding to the interrupt.


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