Dave,

I have thought of that, but as there is no instruction to test-and-clear a
variable in a single cycle a racing-condition could occur. Perhaps a
combination of both solutions to keep the disable-interrupt-period as short
as possible.

Marcel

Dave Dilatush wrote:
> But if interrupt latency is an issue, you can use a different
> method: have the ISR put the 32-bit integer into a temporary
> holding register and set a flag bit somewhere to indicate to the
> main code that a new integer value is available.  The main code
> can test the flag and when a new value is available, transfer it
> to the working variable and then reset the flag.  The ISR, in
> turn, refrains from updating the holding register unless the flag
> has been cleared by the main code.

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