Bryan Mumford wrote: > But where do these mnemonics come from? > Perhaps I'm out of the loop, but the data sheets don't seem to show > these variants. See "Instruction Set Summary" section of any data sheet. Near the beginning of the section (I'm using the 16F87x data sheet as example) is a chart called "Opcode Field Descriptions" that describes the W, F, and other such symbols. > What would be the point of reading a file register to clear W? Not much, although in rare cases just reading an SFR can change state. However, this question is only the result of several other errors. First, the instruction CLRF myreg, w should be illegal according to the data sheet. I can see how it could slip thru the assembler because it's probably handled like all other file register operation instructions, but it is documented differently. The CLRW instruction is provided as the mnemonic to explicitly clear the W register. I see nothing in its description that indicates the low 7 bits of the opcode are used as a file register address upon which a read is performed. This is merely someone's supposition based on the fact that the CLRF and CLRW opcodes otherwise follow the pattern of file register operation opcodes. I think it is incorrect to state that CLRW will read a file register as part of its operation without explicit information from Microchip to that effect. The information they currently provide states exactly the opposite. In the mean time, you can use MOVLW 0 to clear W. It takes the same number of cycles and words, but does not alter the Z flag (which you would probably not want altered if all you're doing is clearing W). ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body