> -----Original Message-----
> > From: 1zlx0fc02@SNEAKEMAIL.COM [mailto:1zlx0fc02@SNEAKEMAIL.COM]
> > I'm using 4 bit mode and the lower bits of the module are
> > floating high. I figure that's ok because bit 1 and 0 of the
> > upper nibble is what sets the data length regardless of the
> > states of the lower nibble. I'll ground those other lines
> > though, since that's really the right thing to do.
>
> From: Hulatt, Jon [mailto:jhulatt@MONSTEREUROPE.COM]
> Tie the low 4 bits low.

I respectfully disagree, you do not need to tie the extra four lines low.  I
cannot find the document at the moment, but I am positive that the LCD
handles the unconnected pins properly when in 4 bit mode.

> From: Hulatt, Jon [mailto:jhulatt@MONSTEREUROPE.COM]
> I'd agree. I looked at a lot of the PIClist code for LCD's,
> and found the
> timing to be really quite optimistic. Particularly then
> toggling of the E
> line; many of the samples just set it high, NOP, and then set
> it low again.

How optimistic this is depends entirely on the speed of the PIC.  The E
pulse typicaly has a minimum width of 230ns.  On a 40MHz PIC, one NOP
between setting the E pin low and high might be getting a bit marginal.

> It seems that LCDs can miss this. Which is not all that
> suprising given that
> they run at a few hundred KHz, compared to the pic's multiple MHz.

But the parallel interface is not simply polled by the processor, if it were
all the control signals would need to be an order of magnitude slower.  The
LCD controller has latches on the input.

> From: Hulatt, Jon [mailto:jhulatt@MONSTEREUROPE.COM]
> The next thing I'd try is putting stupid timing in
> everywhere. Wait 100ms
> between commands, and make your strobe subroutine hold the E
> line high for
> say 5ms.

There really should be no need to start using extreme timings.  Simply
follow the manufacturers datasheet to the letter, especialy with regards to
initialisation and there should be no problems.  Note also that the LCD
modules have some requirements with regard to supply voltage rise times,
over which the internal reset may not function, powering the device up in an
unknown state.  Also note that the busy flag is not readable until you have
fully configured the module for either 4 or 8 bit mode.

Regards

Mike




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