Olin Lathrop wrote:
<snip>
> I can understand an occasional screwup getting shipped.  It's a little
> harder to understand how something this blatantly busted ever made it =
out
> the door.  What really pisses me off, however, is that they apparently
> waited until they had fixed silicon in hand before admitting the =
problem.
> That's inexcusable.
<snip>

Yes I agree, and it's not the first time, this started around the time =
for the new gen
18Fxx and above. I (well me and my company) was bitten by the crossing =
half program
memory of the initial 18F452, we had to (to this date) replace about 100 =
units
already in service, some of those costs around $3000-$4000 to 'fix' ( =
there is=20
govermenmt regulations/re-calibration/re-verification involved). I even =
haven't got
microchip (or atleast the local supplier) to get me new chips !=20

Also the other week I think I stumbled onto a new bug in the 18F452 =
(date code: 031129G),
it could still be my programmer(labtool48XP), but the evidence sofar =
points to an problem=20
in the chip.
These settings:

;Program Configuration Register 5H
        ;a) data eeprom no code protect
        ;b) bootblock code protect 0x00000 - 0x00200
                __CONFIG    _CONFIG5H, _CPB_ON_5H & _CPD_OFF_5H

;Program Configuration Register 6L
        ;a) write protect 0x00000 - 0x07FFF
                __CONFIG    _CONFIG6L, _WRT0_ON_6L & _WRT1_ON_6L & _WRT2_ON_6L & =
_WRT3_ON_6L=20

;Program Configuration Register 6H
        ;a) data eeprom not write protected, boot block 0x000-0x1FF, configregs =
write protected
                __CONFIG    _CONFIG6H, _WRTC_ON_6H & _WRTB_ON_6H & _WRTD_OFF_6H
.
.

caused *any* ee write to fail (i.e. data not stored in eeram), bits and =
flags
were set correctly and no error flags were set, tha data just wasn't =
there.
(Trapped by an ee verify routine)=20
Mind you these settings works flawlessly in the ICE2k the problem only =
arises
onboard the real chip.

Changing to these settings:
.
.
;Program Configuration Register 5H
        ;a) data eeprom no code protect
        ;b) bootblock no code protect 0x00000 - 0x00200
                __CONFIG    _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H

;Program Configuration Register 6L
        ;a) write protect 0x00000 - 0x07FFF
                __CONFIG    _CONFIG6L, _WRT0_ON_6L & _WRT1_ON_6L & _WRT2_ON_6L & =
_WRT3_ON_6L=20

;Program Configuration Register 6H
        ;a) data eeprom, boot block 0x000-0x1FF, configregs not write protected
                __CONFIG    _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H

Made the write to eeram work.
Sofar I do not put blame on microchip as the programmer cannot be ruled =
out.

Anyone else seen this ?

/Tony

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