> So, for a solution try this:
>
> 0204  bitnum
>                    rlncf  WREG   ;Double offset for PIC18 family only.
>                    addwf   pcl            ;
>                    retlw    0x01
>                    retlw    0x02
>                    etc
>
> It is for this same reason that you can only get 128 RETLW (and not 256)
> table entries per 256 address locations with the PIC18 family. You only
> get 64 GOTO tables!

First doing a rotate can be a bad way to do it, because you first need to
clear the carry bit.

Second there is no 64 entry limit, just as there is no 256 entry limit on a
16 series chip - if you do the calculations correctly.

Note that in Jinx's code he stores W in a variable anyway, so the easier way
of doubling the value is the following code line

     addwf    temp,w    ; value of w already in temp, so w = 2*w
                        ; no need to clear carry first

and then the following code allows a greater than 256 (16 family) or 128 (18
family) entries
    btfsc    status,c    ; has doubling w set carry flag?
    incf    PCLATH        ; assume PCLATH already set to correct value
before entering here

this code will allow up to 512 (16 family) or 256 (18 family) entries
provided the table starts on a 256 byte page boundary (i.e. the addwf pcl
instruction is in the last byte location of the previous page). However as
someone else pointed out both the size restriction and the page boundary
restriction can be removed by doing a full 16 bit calculation (I guess a 21
bit calculation is allowed on an 18 series) to load the registers.

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