source= http://www.piclist.com/piclist/2003/10/15/075952a.txt?

I am surprised that so many people have replied to this thread and
no one has fully explained the likely problem.

Yes PCLATH and PCLATHU need to be set to the destination
address before you do the addition to PCL as Olin pointed out.
However there is more to it than that.

The PIC18 family are BYTE orientated micros. The addresses
count up in BYTES not WORDS.

However instructions (including the RETLW xx) are 16-bit
words.

Therefore your offset in WREG that you add to PCL NEEDS TO
BE MULTIPLIED BY 2 BEFORE YOU ADD IT TO PCL.

This applies also to tables BRAnch instructions and tables of GOTO's
as well. In the case of a table of GOTO's the offset needs to be
multiplied by FOUR as the GOTO is a two word instruction.


With the posted code the only offset that will probably work as intended will
  be '0' I say probably as there is a chance that the coder has already
doubled the offset though no information was given and therefore it
seems unlikely.

So, for a solution try this:

0204  bitnum
                   rlncf  WREG   ;Double offset for PIC18 family only.
                   addwf   pcl            ;
                   retlw    0x01
                   retlw    0x02
                   etc

It is for this same reason that you can only get 128 RETLW (and not 256)
table entries per 256 address locations with the PIC18 family. You only
get 64 GOTO tables!

This is one area where the PIC18s went backwards compared to the
PIC16 family.

BTW. This matter is covered in the microchip 16C74a to 18C migration
document, see page 3 of this document.

http://www.microchip.com/download/appnote/pic18/00716a.pdf

Regards,

Jim Robertson
NEWFOUND ELECTRONICS

>Is there something I don't know about RETLW on the 18F ?
>I've used it many times on other PICs without problem but
>what I thought would be as simple on the 18F has me baffled
>
>- there are no interrupts active
>- neither is WDT
>- single-stepping in MPLAB confirms program flow
>
>==============================
>
>This CALL works fine
>
>01AE         call    cp_name
>01B0         btfss   nameok
>01B2         bra     snd_err
>
>0272 cp_name
>                    movlw   upper(devnames)
>0274          movwf   tblptru
>                    etc
>02CE         return
>
>==============================
>
>But this adds W to PCL and returns immediately to 00xx, not
>to 01E8
>
>01E2         movwf   devno
>                   call    bitnum
>01E8         movwf   temp
>01EA         bra    cp_num
>
>0204  bitnum
>                   addwf   pcl
>                   retlw    0x01
>                   retlw    0x02
>                   etc
>
>===============================
>
>The problem is obviously (?) something to do with the high part
>of PCL, but I can't see anything in the manual that suggests it
>works differently to other PICs, and I'm prettty sure I've left nothing
>out that I'd normally use (famous last words)



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