Endurance is per memory location. Refresh is required for any cells that have not been written during 1,000,000 writes across all memory locations. Bob Ammerman RAm Systems ----- Original Message ----- From: "Ken Pergola" To: Sent: Friday, September 26, 2003 6:34 PM Subject: Re: [PIC]: EEPROM refresh - what is it? > Hi Jan-Erik, > > The real confusing thing about all of this is that if one follows the advice > in the data sheet regarding refreshing the EEPROM, one appears to be > violating parameter D120 (ED) which is the cell endurance -- which is 10X > less than parameter D124 (TREF). > > In other words, once you get to the point where you need to refresh the > EEPROM according to the D124 spec, you've already spent your endurance > budget! At least that's the way I see it. See below for more details: > > > (I'm specifically referring to the PIC18FXX2 data sheet (DS39564B) on page > 268) > > > D120 (ED) - Cell Endurance: > --------------------------- > 100,000 erase/write cycles minimum, 1,000,000 erase/write cycles typical > (conditions: -40 deg C to +85 deg C) > > > D124 (TREF) - Number of Total Erase/Write cycles before refresh: > ---------------------------------------------------------------- > 1 million minimum, 10 million typical. > (conditions: -40 deg C to +85 deg C) > > > Data EEPROM endurance and refreshing is not currently something I need to > worry about, but I'll probably see if I can get all of this clarified with > Microchip. Changing the subject back to the EEPROM refreshing > recommendation, I'm wondering if this applies to the older parts that have > data EEPROM like the PIC16F877, since there is no mention of EEPROM > refreshing in the PIC16F87X data sheet DS30292C. > > > Best regards, > > Ken Pergola > > -- > http://www.piclist.com hint: The PICList is archived three different > ways. See http://www.piclist.com/#archives for details. > -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.