Andy Warren wrote: > P.S. By the way... To answer the original question, a "refresh" > would be a re-writing of all the data in the EEPROM. Hi Andy, Yes, the code snippet (PIC18FXX2 data sheet DS39564B, page 68) shows exactly that. But maybe I did not explain clearly enough what I thought was inconsistent. Let me try again: '6.8 Using the Data EEPROM' (PIC18FXX2 data sheet DS39564B, page 68): --------------------------- "...Frequently changing values will typically be updated more often than specification D124. If this is not the case, an array refresh must be performed..." Isn't the second sentence above implying that if the # of updates is fewer than the D124 spec then an array refresh must be performed? That is why I'm confused -- it appears to contradict the definition of D124 below. The definition below implies that when the erase/write cycles hit 1 million, an array refresh should be performed. Definition of Specification D124: --------------------------------- Specification D124 (TREF) "Number of Total Erase/Write cycles before refresh" 1 million minimum, 10 million typical. Conditions: -40 deg C to +85 deg C. Does this seem contradictory to you or am I looking at this the wrong way? Maybe I should take my own advice and contact Microchip about this. :) Thanks, Ken Pergola -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.