Ken,

Thanks for the reponse and helpful advice.

I have since been playing with C code for the RX routine and managed to =
get it going.

I finally used a scope and toggled a pin as the sampling was occurring =
to get accurate
sampling. I did the same for the delay to first bit (triggerred off =
start bit low
transition and measure time to pin toggling at start of sample delay.

The major hassle is that depending where I declare variables used in the =
code,
the latency from arriving at interrupt handler (0x08) to servicing my =
code
varies. It seems the Hi-Tech C compiler decides what registers to save =
depending
on what it "thinks" it needs to process the interrupt.

To make these declarations a little more independant of my main code,
I put them into the interrupt module itself. I am hoping now as I add =
timer=20
interrupts etc, that the resources required for these do not change the =
latency
too much or else I will need to get my scope out and play with timing =
each time I make=20
a code change.

Even if I use a timer to sample, the latency issue from start bit to =
handler is not
resolved.

Any ideas/comments ?


Kind Regards

David Huisman


-----Original Message-----
From: Ken Pergola [mailto:no_spam@LOCALNET.COM]
Sent: Friday, 26 September 2003 1:37 PM
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: [PIC]: PIC18F assembly code help required


Hi David,

This will not solve your problem and is not related to your question, =
but
one code optimization thing popped into my head when I looked at your =
code:
you can save some program memory by replacing those gotos to branches
(BRA) -- at least in the example you posted since the destinations are =
well
within the range allowed for short jumps. Maybe you knew this already -- =
I'm
not trying to nit-pick, but if you ever find yourself fighting for code
space, these little things add up. Just trying to be helpful.

Can you post the output of the compiler that shows where it chokes on =
the
inline ASM code you posted?

Maybe this will help: Did you see Michael Rigby-Jones' reply to the =
thread
"ASM in Hi-Tech C error" ?:


Michael Rigby-Jones wrote:

> 2) The HiTech assembler does not support the use of '1' and '0' to =
specify
> destinations and ram banks (a very good idea IMO).

> w is used to specify W as the destination
> f is used to specify the file register as the destination
> b is used to specify a banked register as the target (i.e. target =
defined
by
> BSR register)
> c is used to specify a common register (i.e. access bank)

> The correct syntax is therefore:

> asm("CLRF _SSPBUFF,c")



Best regards,

Ken Pergola




-----Original Message-----
From: pic microcontroller discussion list
[mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of David Huisman
Sent: Thursday, September 25, 2003 8:19 PM
To: PICLIST@MITVMA.MIT.EDU
Subject: [PIC]: PIC18F assembly code help required


The following code snippet compiles ok for PIC16F876 and I want to port =
it
to PIC18F252.
(I have changed RRC to RRCF as this was immediately obvious).

The Hi-Tech C compiler declares

"Fixup overflow referencing psect bigbss (loc 0x40 (0x2A+22), size 1, =
value
0x5CC)"

I am not yet familiar with the syntax differences between 16F and 18F
assembly code.

Would someone be kind enough to look at this code and explain what I =
need to
do to
get it to compile successfully for PIC18F252 target ?

Thanks

#asm
                clrf     _rx_char
                movlw    0x09
                movwf   _count
                movlw    0x52
                movwf   _delay
   RXWait: decfsz  _delay
                goto     RXWait
                movlw    0x42
                movwf   _delay
                decfsz  _count
                goto    NxtBit
                goto    Exit
  NxtBit:     bcf     _STATUS,0
                btfsc   _PORTB,0
            bsf     _STATUS,0
            rrcf    _rx_char
            goto    RXWait
   Exit:
 #endasm


Kind Regards

David Huisman

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