> SUMMARY    When sending 7 bit ASCII data a substantial increase in clock
> speed error margin may be had by simply setting the unused MSB to 1 (!)

Setting multiple MSBits to 1 can make this even better.

Remember that rate error is independent of actual clock speed. So, if your
communication link will support, for example 2x the current clock rate, you
can:

1: Transmit each byte as two bytes, each containing 4 data bits and 4 MSBits
set to 1.

Without a lot of fancy analysis you can see that you have only about half
the time that the two ends have to be in 'sync', so your tolerance should be
about double.

Going to 4x with 2 data bits and 6 MSBits set to 1 should give you somewhere
around quadruple the tolerance.

The exact computations are left as an exercise for the student.

Bob Ammerman
RAm Systems

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