> Same thing on serial bit rates. Both of you can't be 6% off in opposite > directions, but one of you can. Actually 5.8% error is the guaranteed to fail threshold assuming 1 start bit and 8 data bits. In reality, total receive/transmit clock error more than half that is not a good idea. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads