On Monday 22 Sep 2003 11:17 pm, you wrote:
> > Below is the routine.
>
> Start by properly documenting what each section of code expects at its
> entry point, paying particular attention to what is in W and any bank
> setting assumptions the code section makes.  There are a number of problems
> that should become obvious once you take these first small but necessary
> steps. This is especially important when code looks like an explosion in a
> spaghetti factory like this one, but that's another issue.  One step at a
> time.

I am glad someone else said that first.  I had a dreadful time trying to work
out what was happening.

>
> HINTs:
> Check bank setting around FSR use.  Take a look at what READ_MORE requires
> in W, then check all paths to READ_MORE for compliance.
>

I would add that much of what happens in this interrupt routine would be
better done outside it.  As a general rule and interrupt routine should do as
little as possible before returning in order to ensure that it does not delay
other interrupts.  In this case I would recommend the interrupt routine only
does:

1.  Check for valid data.
2.  Place data or error data in a buffer.
3. (Possibly) set a falg to indicate data is available.

All the other work, with the possible exception of the serial TX, should be
done in the background.

Ian

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