> While configuring the QQQ_INTR.ASPIC part, I get the
> error below. It's not clear to me if I have done
> something wrong (not impossible !), or if it's something
> else. Anyway, what should I be looking for ?
>
> Jan-Erik.
>
> From the .LST file :
> (I have cut down the comments a bit)
>
>
>       00090 ;
>       00091 ;   This state is private to the interrupt...
>       00092 ;   be accessible regardless of the current...
>       00093 ;
> Error[154]  : Each object file section must be contiguous
>               (section .udata_shr)
>       00094          UDATA_SHR
> 0000  00095 W_SAVE   RES     1   ;saved W during interrupt,...
>       00096

I just tried a bare 12F629 project and the INTR module assembled fine,
after stripping out the UART stuff of course.

The assembler is complaining that you tried to define two separate
UDATA_SHR sections in the same source module, which is definitely a no-no.
I'm guessing you added some of your own variables immediately above the
code you showed.  It probably defined a UDATA_SHR section, and the
assembler complains when it hits the second definition.  It looks like the
UDATA_SHR in my template is a holdover from before I had the DEFRAM macro.
It should probably be DEFRAM COMMREGS_FIRST instead.  That should fix the
problem if you defined your own section using DEFRAM too.

Can you send the whole module, or at least a stripped down version that
still exhibits the symptom?  I'd like to make sure this is fixed right
instead of just blindly changing the UDATA_SHR to DEFRAM COMMREGS_FIRST.

This all goes back to the problem of different PICs having different
memory configurations while trying to make code that automatically adapts
itself.  The 12F629 has the opposite problem of the 16F874 discussed
recently.  It has ALL global RAM and no banked RAM.  To try to make things
as compatible as possible, I defined the first 16 bytes of this RAM region
as global in the linker control file, and the rest as being in bank 0.
This allows use of both UDATA and UDATA_SHR, but does create an artificial
division.


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