Jan-Erik Soderholm XA (TN/PAC) wrote:
> michael brown wrote:
>> He's apparently using a 16F873 or 16F874.  According to the
>> datasheet, there is no shared ram between Bank 0 and Bank 1.  I have
>> wondered the same question about how to properly save context on
>> these particular chips.
>
> Is the description on page 152 of DS39582A wrong ?

Page 14 clearly shows that Bank 0 and Bank 1 do not share any common
locations on the 873 and 874 chips.  To answer your question though, no
it is not wrong.  It appears that their method should work fine.

I had a mental block regarding how to insure that Status would be loaded
from the correct bank when exiting the ISR.  I now see how they "cheat"
a bit by copying Status to W before clobbering it in order to switch to
BANK 0.  Sorry for the senior moment.  I thought there was a catch-22
type issue here, but as usual, I was wrong.

michael

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