On Tue, 9 Sep 2003 21:51:56 -0500, "Aubrey McIntosh, Ph.D." wrote:

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>I was looking at page 16 of 30292c.pdf, the PIC 16F87x Data Sheet.  Figure
>2-4, the 16F874/73 register map shows two banks of General Purpose
>registers, 0x20 -- 0x7F and 0xA0 -- 0xFF.  These same banks are also
>addressed when the addresses 0x120 and 0x1A0 are addressed.
>
>I was also looking at the example code, template\object\f874tmpo.asm, which
>has a code snipped to save registers when the interrupt routine at 0x04 is
>invoked.  While familiar to us all, I quote directly from that file below:
>
>Not only all that, I was also musing on the behavior that my program
>exhibits, which is contrary to my desires and expectations.
>
>My question is this.  If I intend to access memory at 0xA0, and am in the
>middle of code when
>the interrupt happens, isn't this the indicated instruction sequence?
>

Have a look at page 130 for Example 12-1. It lists the sequence to
save and restore STATUS, W, and PCLATH across your interrupt code.

Note: Watch your banking.

1) Since STATUS is cleared in the third line, be sure to have
STATUS_TEMP and PCLATH_TEMP allocated in bank 0 RAM.

2) Since you can't know what the STATUS register contains when W_TEMP
is saved and restored, W_TEMP must be 'double allocated' so that it
will work correctly regardless of the bank setting when the interrupt
occurs.

Regards, Bob

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