I did do that, thought it did not make a difference but it actually did. It
is not the same as if the processor hangs up as the output I am monitoring
carries on anyway. You just see a short change as it resets.
    I have changed the osc back and forwards a couple of times, HS
everything functions correctly, HSPLL and it malfunctions. Now to see if I
can make it start if HS and change to HSPLL on the fly.

----- Original Message -----
From: "Jan-Erik Soderholm XA (TN/PAC)" <jan-erik.xa.soderholm@ERICSSON.COM>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Sunday, August 31, 2003 11:14 PM
Subject: Re: [PIC:] 18f1220 xtal osc.


> Why not try (just as a test) to comment out the clrwdt
> instuction *now* ?
>
> Jan-Erik.
>
>
> gtyler wrote :
> > I just changed the clock to HS mode so that it runs at 10Mhz. guess
> > what: so far I have not been able to make it malfunction.
>
> --
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