Hi Ken,
        I have a printed version and studied the osc section.  The symptoms
are what you would expect if the osc is not running, ie all i/o's high
impedance, no outputs etc. what I don't understand is that the watchdog is
enabled, surely it should cause a reset? Mclr is only connected to the icsp
header and is disabled, though I have since redesigned it with microchip's
reccomended circuit. I have just got back from delivering the artwork to the
pcb guy and will get it back over the week end so that I can try it. Exact
frequency is not too important, it is driving a sort of 26khz igbt inverter
consuming about 8A from 230Vac, and as it is resonant, has to syncronise the
igbt drive signals.
    Thus it has two antiphase outputs and another pulse used to sync a buck
regulator driven by a 3826 control chip.  If I cause a brownout by dropping
the supply voltage somethimes it works again when power is restored,
sometimes not. I'm using an ICD2.
I think the watchdog should prevent this, but it does not. Just had an idea:
I will remove the clrwdt instruction and see if the watchdog times out.


----- Original Message -----
From: "Ken Pergola" <no_spam@LOCALNET.COM>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Sunday, August 31, 2003 8:41 PM
Subject: Re: [PIC:] 18f1220 xtal osc.


> Hi George,
>
> I'm still hoping you can provide some more details about the problem you
are
> having. What I'm not clear about from your posts is what do you expect the
> code to do initially upon power up, and what is the board actually doing?
It
> is difficult to help you troubleshoot without some more details.
>
> Are you using an ICE, ICD, or just the board itself?
>
> Does the board have any LEDs that you can light up at different points in
> your code to see if the actually program is actually executing?
>
> What are all of your CONFIG settings?
> Can you post your startup code?
>
> Regards,
>
> Ken Pergola
>
>
>
>
> -----Original Message-----
> From: pic microcontroller discussion list
> [mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of gtyler
> Sent: Sunday, August 31, 2003 11:22 AM
> To: PICLIST@MITVMA.MIT.EDU
> Subject: Re: [PIC:] 18f1220 xtal osc.
>
>
> This is what I found eventually:
>
>     If you use MCLR to give a reset pulse the problem is still there, it
> sometimes hangs up on powerup. The watchdog timer should catch it anyway,
> but it does not, although it is enabled in the config reg. Eventually I
> fixed the problem by setting the swdten bit as well as turning it on in
the
> config reg. According to the data book if it is turned on in the config
reg
> swdten has no influence, but it seems that it is still required.
>     Usually when I see a "bug" in these things it turns out to be a "bug"
in
> my brain instead, so I'm not convinced that it is yet.....
>
> ----- Original Message -----
> From: "gtyler" <gtyler@DRUMMOND.ORG.ZA>
> To: <PICLIST@MITVMA.MIT.EDU>
> Sent: Saturday, August 30, 2003 12:08 AM
> Subject: Re: [PIC:] 18f1220 xtal osc.
>
>
> > ----- Original Message -----
> > From: "Ken Pergola" <no_spam@LOCALNET.COM>
> > To: <PICLIST@MITVMA.MIT.EDU>
> > Sent: Thursday, August 28, 2003 10:08 PM
> > Subject: Re: [PIC:] 18f1220 xtal osc.
> >
> >
> > > Hi George,
> > >
> > > Sounds like you still have some strange behavior with your project,
yes?
> > >
>
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