But if the IIRC spec is 400khz, why are people MAKING much faster chips?
Look at http://www.ramtron.com/products/datasheets/FM24C256ds_r1.2_8p.pdf
which is rated at 1Mhz. And our beloved Microchip has versions of deep
memory at 1Mhz:
http://www.microchip.com/download/lit/pline/memory/ic/21203j.pdf

The only way 1Mhz+ can be done RELIABLY is by driving the CK and SD  then
reverse the TRIS bit when picking up the ACK or READING the bit.

--Bob


At 07:59 PM 8/22/2003 -0600, you wrote:
>At 08:33 AM 8/22/2003, Bob Axtell wrote:
>
>>My biggest concern with open collectors is (1) higher overall current drain
>>and (2) loss of speed. The original spec called for 100Khz clock speeds.
>>MANY I2C devices can operate at 4Mhz now.
>
>IIRC, hi-speed I2C is 400 KHz, not 4 MHz.  Factor of 10 slower makes a huge
>difference!
>
>dwayne
>
>--
>Dwayne Reid   <dwayner@planet.eon.net>
>Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
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--------------
Bob Axtell
PIC Hardware & Firmware Dev
Tucson, AZ
1-512-219-2363

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