I think ten or so days ago someone posted code
fragment that deals with this 1 cycle jitter issue.

Samo

>BTW, if this is for a
> midrange part, isn't true
> that most of the time the interrupt latency is 1
> instruction cycle, but
> sometimes it's 2? In which case, any software based
> delay based on
> interrupts will have 1 cycle of jitter.
>
> Scott
>
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