I am working on a project for a client that I have taken over from the
original developer.
My mandate is to fix all of the problems with the product while trying to
maintain backwards
comparability with the existing product install base. It is a CAN network
that has 1 control unit
and two actuating units.  All units send a message out every 20 ms
indicating their health.
The messages are not synchronized so that over time, they do overlap.

The problem.
The original designer treated the arbitration field as a destination
address field when he designed the
higher level protocol.  This means the two actuators can theoretically both
send a message to the
control unit at the same time, with the exact same 11-bit identifier.  If
this occurs, i expect the
both actuators will get through the arbitration [hase successfully and one
will detect a transmit error
as soon as its data is different and its a recessive bit.

The question.
The actuator that first detects the transmit error will initiate an error
frame of 6 dominant bits.
Somewhere during the error frame, the other actuator will detect the bit
stuff violation and generate
its own error frame (the error echo).

The question is: Both actuators will attempt to re-transmit the packet
again.  Will they be in sync still
after the error frame completes, with echo, or will one start its
transmission ahead of the other and
break the cycle?

Why am I asking? Because this product has already shipped units and I need
to fully understand the
implications of the current design.

Oh ya, the design is using an MCP2510 and I have read the errata and
implemented  the work arounds
in the new software. The previous designer had not read the errata.

regards,

Bob Bullock

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