>     Does anyone know the width of the SPI clock pulse
> generated by the PIC MSSP module?  Is it "fixed"
> or does it vary (by device type, MSSP initialization
> parameters, clock rate, etc.)?  I could not find this
> in the 16F877 (for example) datasheet or the midrange
> manual.

The clock pulse varies as the timing varies. The SPI clock is based on
the master processor's clock on every system I've seen.

I would say the data pulse should start *just* after the clock pulse
and end just after the clock pulse.

The recieving device should not depend on speeed; all of this is
controlled by the master. There are some really good timing diagrams
in the datasheets of the PICs.

>    I am looking to write an SPI slave in firmware, so
> I assume I need to know the pulse width.  My
> understanding is that SPI data is valid during the
> pulse (at least when clock polarity is low and clock
> phase is "zero").  I want to write this in C so
> I want to make sure I can process the data in the
> available time.

You shouldn't need to know the pulse width, but some slaves specify
the fastest speed the master's clock is allowed to go.

I think you said it perfectly correct up there: the SPI data is valid
during the pulse (with variations).

I hope this helps.
--
D. Jay Newman          !
jay@sprucegrove.com    ! Xander: Giles, don't make cave-slayer unhappy.
http://enerd.ws/~jay/  !

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