>If you're controlling the ALU simply because you don't like the idea of
>"messy" outputs FROM the ALU due to "messy" inputs TO the ALU, you probably
>are not building much of a CPU. There's a lot more to CPU design than the
>ALU.

Ah... I'm trying to build an instruction decoder out of EPROMs... Do you
think this is going to be cutting edge?

As to Peter's comments on using a pipeline, I wasn't really thinking of
using a pipeline initially.  I haven't done much with CPU theory or
design.  I've really only ever looked at existing CPUs and, frankly, I
honestly wouldn't know how to put the pipeline into my CPU.

I understand pipelines in theory, but I am having a bit of trouble seeing
how to apply a pipeline to a stack based machine.  I mean I can see how
doing a 2-stage pipeline would work, (fetch next instruction during current
instruction), but beyond that, I'm not too sure.

I'm thinking more along the lines of using microcode segments that have a
variable length and using a fast instruction clock so that instructions
take a widely varying amount of time to execute, but each instruction is as
optimized as it can be.

I'm certain that someone here can tell me either what pipeline segments to
use in a stack machine or why not to use the above described technique.

--Brendan

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