If you have such a time sensitive loop, disable interrupts, assuming that you can be COMPLETELY done the loop in less than a second (or a serial character time). The Timer1 overflow will be 'pending' when you reenable that interrupt, and will just be serviced late. Also, don't do all of the TOD incrementing in the ISR. Set a flag that your main background loop will see, and then return. That way the slow TOD increment cascade takes place at background priority. I use a counter flag in the TOD ISR, and simple increment it each int. If the background finds that the counter is non-zero, it adds it to the TOD seconds, clears the flag, and wraps TODS modulo 60. That way the background can miss several updates, but still 'catch up' when it has cycles available to it. There is a tiny window of time between where the add occurs and the counter gets cleared, where the Timer could interrupt, and be missed, but since my RTC is not that accurate, the loss of a tic or two over many days of operations is irrelevant. If that bothers you, turn off int's just before the add, and back on right after the following clear. Alex Kilpatrick wrote: > > The datasheet for the 18F1220 describes how to use it as a RTC with an > external 32.768K crystal. I understand the basic operation to be as > follows: > > 1) Pre-load timer1 so it overflows every second > 2) In ISR, increment a set of second, minute, hour values to maintain a > time > > That all makes sense. But what I don't understand is how you integrate > that ISR with other things that may be happening on the chip. For > example, if I have a time-sensitive asynchronous serial routine, I would > expect that I would have to disable interrupts so that I didn't mess > that up. And if I disable interrupts, won't it throw the clock off? > > Specifically, I am thinking about doing irDA with a 4 Mhz clock. A irDA > serial pulse is only two instructions long at that rate. Then you have a high probability of missing pulse if you're doing -anything- else during the stream. What about an external shift register to get you 8x more clock cycles to work with? Robert -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu