On Saturday 14 June 2003 18:33, Olin Lathrop scribbled:
> According to the data sheet, the timer needs to be off for reliable
> writes, since an increment at the wrong time can apparently produce
> unpredictable results.

Yes.  And I've noticed that of 2 app notes I found that use/set TMR1, nei=
ther=20
are switching it off before writing.  Yet they claim to be "real-time" ap=
ps. =20
I'm planning to try their technique just to see what type of timing it gi=
ves=20
me.  IIRC, one is writing 0x80 to TMR1H for 1-sec interrupts, but they do=
 it=20
a few instructions into the ISR.  I can see that if done only a few=20
instructions into the ISR, writing to the hi-byte only cannot really mess=
 up=20
the counter pair since it should be at zero all during this time, but wha=
t=20
about the prescaler?


> > According
> > to the datasheet and mid-range-mcu manuals, the prescaler is cleared =
on
> > writes to the TMR1H or TMR1L registers.
>
> The prescaler is irrelevant since its divide value is 1 (else you would=
n't
> be getting 2S overflows from a 32,768Hz crystal).

Doh!  I've been overanalyzing again!  I have TMR0 prescaler at 1:32, and =
have=20
this number on the brain!  Arrrggghhh!!!!


> All this says you need to not mess with the timer directly.  That leave=
s
> several choices, however.
>=20
> 1  -  Use the CCP in special trigger compare mode.  This allows selecti=
ng
> an arbitrary period.

Haven't played with CCP ever, but I might go read up on it now.


> 2  -  Calibrate the internal oscillator against timer 1, then use the
> internal oscillator to interrupt at whatever period you like.  You will
> need to chain several interrupts together for long periods, and you can
> readjust each time to timer 1 to avoid accumulating long term errors.

Exactly what I did on the last one.  Since the jitter on colon flashes an=
d=20
every odd-valued second was not critical, I whittled it down to 1 8-bit=20
counter (that I incremented manually on tmr0 interrupts), and checked for=
 key=20
values.


> 3  -  Watch bit 6 of TIMR1H in a polling loop.  It changes every 500mS.

I like this!


> 4  -  If you want to sleep between 2Hz interrupts (you didn't mention
> that), use the watchdog, but calibrate against timer 1 for no long term
> error.  I just did a project where every 100nA mattered, so the watchdo=
g
> was out of the questions on a 16F630.  The processor needed to wake up
> every 10-11 seconds to perform an action.  We created a micropower
> external RC-based timer with a period usually from 50mS to 150mS, then
> recalibrated every 1000 ticks against the internal 4MHz oscillator.

Eventually this *is* how it will be setup ... sleeping between the 2Hz pu=
lses=20
when an external switch is in a certain state.  It'll operate off a car=20
battery, so power consumption is not super critical, but still needs to b=
e=20
low.

> 5  -  Use a 18F1320 instead so that the processor can run from the time=
r 1
> oscillator when it's got nothing else to do but wait for the next 2Hz
> tick.

Still haven't picked up any 18F parts, but for now I'd like to get it wor=
king=20
with the 16F628.  That prescaler enlightenment above gives me hope now, s=
o=20
I'll test that first.

Cheers,
-Neil.

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