> -----Original Message-----
> From: Peter Moreton [SMTP:peter@RIL.ORG.UK]
> Sent: Thursday, June 12, 2003 12:15 PM
> To:   PICLIST@MITVMA.MIT.EDU
> Subject:      Re: [PIC]:3rd Overtone- Now: [Pic]: HS/PLL issues when
> Genlocking to Video sync
>
> I have followed this thread with interest as I am using a 9.8Mhz
> 'Crystal Module' (rectangular metal DIP-14 package) on a PIC18F452. I
> had assumed that this should be used in HS or HS+PLL mode, (and it works
> fine when set this way) but it looks from the postings in this thread as
> though I should be setting the oscillator to EC mode - could someone
> confirm my understanding, thanks.
>
It will work fine with the HS setting (or XT come to that), but the EC
option was introduced specificaly for use with external oscillators.  Using
it can either give you another I/O pin (RA6) or a divide by four clock
output on OSC2.

Mike


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