> -----Original Message-----
> From: Daniel Sweet [SMTP:daniel_sweet@NTLWORLD.COM]
> Sent: Thursday, June 12, 2003 10:26 AM
> To:   PICLIST@MITVMA.MIT.EDU
> Subject:      [PIC]:3rd Overtone- Now: [Pic]: HS/PLL issues when
> Genlocking to Video sync
>
> Hi,
>
> Thanks for the comments, data sheet seems reluctant to come out and admit
> it won't run in HS>25Mhz!!
>
Page 271 of the PDF datasheet.  Maximum oscillator frequency with HS
selected: 25Mhz.  (minimum 4MHz).

> So I may be on the wrong route trying run with a 40Mhz crystal. So here is
> a more detailed explanation of my problem, as I am running short on
> ideas!!
>
> I need to run at 40Mhz for my project, until now I have been using a
> HS/PLL mode with a 10MHz crystal without any problems. I have setup the
> crystal in an external PLL to lock to a 15.625Khz video sync signal (using
> Elantec EL4583 Genlock IC and external divider), this was required to
> allow me to genlock to an incoming video signal and then generate my own
> sync to supply another camera and add on screen graticules to the image
> going to a monitor.
>
> A problem I have found is that when the 18F252 locks its internal PLL to
> the incoming 10Mhz it can be locked in anyone of 4 positions relative to
> the 10Mhz, which is obvious as it will have 4 periods to 1 of the incoming
> signals.
> What i see with my application is that only 1 of these 4 positions will
> work correctly. Not easy to explain the fault but in the other 3 positions
> I can see on the TV monitor that the vertical graticule i generate will
> have a kink in 1 or two places of 100ns (1 instruction Cycle). I believe
> that it is related to the fact that I am interrupting off the incoming
> horizontal sync (15.625Khz) and if the PIC PLL has locked in a 'bad'
> position, the relationship of the clock position to the incoming sync
> signal is borderline and a slight variation can cause the interrupt to a
> occur 1 instruction cycle earlier or later. If the the PIC PLL has locked
> to the 'good' position everything is solid and it works like a dream!
>
> I am currently trying to run the PIC in HS mode with a 40Mhz crystal to
> avoid the HS/PLL issue, hence my first question.
>
> Hope this makes some sense, very tricky to explain. Any ideas to run in
> HS/PLL or any other ideas would be very much appreciated.
>
You can run the PIC at 40MHz directly from an external source.  You cannot
however use the PIC's built in oscillator to run at 40MHz.  The easiest
solution would be to buy a 40MHz canned oscillator, or build your own 40MHz
crystal oscillator.  You then configure the PIC to use EC mode, which
according to page 271 has a maximum frequency of 40MHz.

Regards

Mike


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