> > > -----Original Message----- > > From: M. Adam Davis [SMTP:adampic@UBASICS.COM] > > Sent: Tuesday, June 10, 2003 3:59 AM > > To: PICLIST@MITVMA.MIT.EDU > > Subject: Re: [PIC]: brain teaser > > > > Does it beat all of the options here: > > > http://www.piclist.com/techref/microchip/math/bit/revbits.htm > > > > The fastest one takes 4 instruction cycles (lookup table). > > >I make that 8 cycles (REG being the randomly chosen register): > > movf REG,w ; one cycle > call reverse ; two cycles > movwf REG ; one cycle > >reverse: > addwf PCL,f ; two cycles > retlw 0x00 ; two cycles > retlw 0x80 > retlw 0x40 > >Regards > >Mike Now to the real world. The above example assumes that: 1) The Addwf PCL,f is one address location before a Mod 256 address. 2) That PCLATH is "magically" addressing the right 256 byte page 3) That the PIC involved is not a PIC18 core type. Regards, Jim -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu