ahhh....ok. I just got the DC/DC module and now I can bring the input voltage down to 1.2 and try it again. Thanks Bob. >From: Bob Blick >Reply-To: pic microcontroller discussion list >To: PICLIST@MITVMA.MIT.EDU >Subject: Re: [EE]: followup on the FET source follower circuit >Date: Fri, 30 May 2003 14:41:22 -0400 > >Micro Eng said: > > given a circuit, as Bob described where the drain is the supply side, > > and the source has the load, for an N channel device would this ever > > really work since the Vgs that needs to be asserted for full turnon is > > being adjusted because as the voltage on the gate increases the voltage > > on the source will slowly rise. > > > > I put a circuit together using a IRLR3714, and even at 5V on the gate, > > could only get a little over 2V on the load using 4.5V on the drain > > connection. > > > > Did I miss something on the interpretation ? > >The definition was for 1.2 volts in and 1.2 volts out with 5 volt gate >drive. > >Look at it this way. With a source follower circuit, the output will never >be more positive than gate voltage minus Vgs. But if your input(drain) >voltage is less than that, no problem, the FET is full on, and output is >connected to input. > >That's why I suggested P-channel FETs for all the other voltages, and >N-channel for the 1.2V circuit. > >-Bob > >-- >http://www.piclist.com#nomail Going offline? Don't AutoReply us! >email listserv@mitvma.mit.edu with SET PICList DIGEST in the body _________________________________________________________________ STOP MORE SPAM with the new MSN 8 and get 2 months FREE* http://join.msn.com/?page=features/junkmail -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body