if this comes from elektor, it must be really expensive. isn't it? must be based on a lot of glue logic on a really big pcb... ...but i would like to have a look at the design anyway. is the schematic somewhere on the net? or i which elektor journal has this been published? tino "Jan-erik Soderholm (QAC)" Gesendet von: pic microcontroller discussion list 20.05.03 17:13 Bitte antworten an pic microcontroller discussion list An: PICLIST@MITVMA.MIT.EDU Kopie: Thema: Re: [EE]: Building a PC-based analyzer instead of oscilloscope I'm currently building a logic analyzer from Elektor. 9, 18, 27 or 36 channels. 20 or 40 Mhz bandwidth. 1, 2, 4, 8, or 16 kbit wide. (I'm building it with 18 * 16kbit and 20 Mhz) Serial line with Windows front-end app. Much like you describe... Jan-Erik Soderholm. Martin.Buehler@KEYMILE.COM wrote: >if the scope has to be used for digital debugging... >...wouldn't it be better to build a logic analyzer instead, with, let's >say 16 inputs, detecting anything below 1v as '0' and above 1v as '1' ? >(would fit so for 5v, 3v3, 2v5 and 1v8 logic, as well as for serial i/f >with +/-12v) >this could by clocked by an internal, variable clock source, or by an >external (up) clock (rising/falling/both edges). >as only logic states would have to be transferred, communication with the >pc would be much faster than for transferring analog levels. >when writing some kind of 'intelligent' software on the pc, this thing >could also do protocol analyzing. >tino -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu