Hey, I hate to beat the dead horse but here goes anyway...

Me and a friend from my university are working on a PC-based oscilloscope.
We were just wondering if anyone had any suggestionns on how deep the memory
on such a thing should be etc...

What we have planned for now is a 40 MHz capable paralell ADC with 2 pcs of
32 kbyte 70ns SRAM.  (I had two of theese chips just lying around in an old
Nokia 2110)
By using some buffers and a odd/even tactic on the storing we can achieve 28
MHz from the memory.  This would give us a max resolution of 14 MHz...

28 MSPS with 64 kbyte isn't a whole lot, but is it enough ?
The annoyingly smallish logic-analyser at my campus has only 4 kbyte...

We are also incorporating a programmable clock-generator so we can select
samplerates from 1-28 MSPS in 0.5 MSPS steps.

All ideas and thoughts are welcome.  We aim to build it for less than $70 in
parts so don't go crazy.

    KreAture

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