Datasheet and midrange manual says, that MCLR reset
and WDT timeout during normal operation interrupt the
write too. WREER bit is set, so the user could check
after reset, if the write was succesfull.

Samo



> In any event, I
> would expect that once the EEPROM write sequence has
> been started
> the only thing that would stop the write completing
> is a power-down


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