> ISR bcf INTCON,GIE ; disable all interrupts Interrupts are automatically disabled by the hardware when an interrupt is taken. This is just a wasted cycle. > btfsc INTCON,GIE ; assure interrupts are disabled > goto ISR Two more wasted instructions. > movwf IW_TMP ; context save: W > swapf STATUS,W ; context save: STATUS > movwf STATMP ; context save > clrf STATUS ; bank 0, regardless of current bank > movfw PCLATH ; context save: PCLATH > movwf PCLTMP ; context save > clrf PCLATH ; page zero, regardless of current page > bcf STATUS,IRP ; return to bank 0 Another wasted instruction. You already selected direct and indirect bank 0 above with the CLRF STATUS instruction. > movfw FSR ; context save: FSR > movwf FSRTMP ; context save > > RECEIVE > > fineISR > movfw RXD > SENDw > > ISRend > bcf INTCON,INTF; clear interrupt flag RB0/INT > movfw FSRTMP ; context restore > movwf FSR ; context restore > movfw PCLTMP ; context restore > movwf PCLATH ; context restore > swapf STATMP,W ; context restore > movwf STATUS ; context restore > swapf IW_TMP,F ; context restore > swapf IW_TMP,W ; context restore > RETFIE ; enable global interrupt (INTCON,GIE) There are many examples of interrupt routines out there. Do what you want on your own, but don't ask everyone else to waste time debugging your re-invented wheel. This is a solved problem. For one example, see QQQ_INTR.INS.ASPIC at http://www.embedinc.com/pic. ***************************************************************** Embed Inc, embedded system specialists in Littleton Massachusetts (978) 742-9014, http://www.embedinc.com -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu