Mike Harrison wrote:
>
> It's a long time since I used this chip - I think Elentec do some enhanced versions of it.

They do. And it is a 'better' chip IMO. EL1881C
http://www.intersil.com/cgi-bin2/MsmFind.exe?CFGNAME=MssFind.cfg&AND_ON=Y&ALLCATS=X&EN=X&NO_DL=X&QUERY=sync

Also look at EL4511CU for a 'high performance' (HDTV) sync sep.

> If the line stability is OK, might it be possible to latch the framesync using the line sync ? (I
> Can't remember if lsync is present during fsync)

Depends on the video signal. Interlaced composite video usually
has serrations in the vertical sync. However, many cheap VCR's insert a
fixed width pseudo Vsync to cover their head switching. This has NO
serrations and will wander WRT Hsync since it is derived from the
head drum position (phase) sensor.

Cheap security cameras (particularly old vidicon style) also didn't
bother with serrations.

Your best bet if you need perfect vsync timing (1us jitter is usually
inconsequential in most applications) is to use the next available
(after Vsync) Hsync pulse as your timing reference. e.g. NAND them together.

> >Anyone familiar with the Elantec/Intersil LM1881 Sync Separator?
> >
> >I am trying to use the rising edge of Vertical Sync pulse to trigger a pic intrpt. I have found that the rising edge has unstable timing, with a variation of up to 1us. The falling edge of the pulse appears to be perfectly stable. I have tried various combinations of Rset with no apparent effect on the stability.
> >
> >Has anyone experienced this? Anyone know if it can be corrected? Or will just have to change my code to use the falling edge (would perfer to aviod this if possible).

What is your code doing that you require this extreme precision in Vsync??


> >Thank you
> >Regards,
> >Daniel Sweet

Robert

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