> This type of circuit is somewhat of a kludge.  Wanting an edge to
glitch
> converter is usually a symptom of bad design elsewhere.  Note also
that the
> second inverter should be a schmitt trigger unless the RC time
constant is
> very low.

The reason I need a circuit such as this, is because I need an edge
detector.  Also, a prolonged glitch to latch on the S of a latch.  The
edge detector, causes a short pulse on the clock of the flip flop, why
the second glitch circuit has a longer pulse duration and then the state
gets latched into the flip flop.  In my circuit I am interested in
seeing the state of the edge of two signals.  The circuit must determine
if signal A goes from low to high at the same instant as signal B goes
from high to low.  I know that there is another way of doing this, I.E.
latching previous state of two signals, and comparing the previous with
the newly received signals.  But this requires more logic and a fast
processor.  The state of these two signals as a minimun Tw of 0.5us.
The pic processor can not handle this time requirement. Even when
polling.  So I need a circuit that can do the job faster.

Unless there is a better way of doing this.

Regards,


James

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