>I have recollection of needing to place a NOP right
>after the sleep
>instruction.  Don't remember the reason or which
>family had this
>requirement.  But it might be worth investigating.

Here's an excerpt from the 16F84A datasheet of what
you're probably referring to:

"While the SLEEP instruction is being executed, the
next instruction (PC + 1) is pre-fetched. For the
device to wake-up through an interrupt event, the
corresponding interrupt enable bit must be set
(enabled). Wake-up occurs regardless of the state of
the GIE bit. If the GIE bit is clear (disabled), the
device continues execution at the instruction after
the SLEEP instruction. If the GIE bit is set
(enabled), the device executes the instruction
after the SLEEP instruction and then branches to the
interrupt address (0004h). In cases where the
execution of the instruction following SLEEP is not
desirable, the user should have a NOP after the
SLEEP instruction."

The question is, when would the execution of the
instruction following SLEEP not be "desirable?"

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