Hi -R! > Does anyone know of a good resource for learning "proper" PCB layout > techniques? I've got the Freeware version of Eagle Layout and > ExpressPCB.. are there better tools for laying out boards? Any > direction would be appreciated. 'Know of'? No, but I can whip something up pretty quick. I've done enough tons of them to do it in my sleep. Which I did once in a while. LOL! First, don't bother with Express unless you intend to use their fab services regularly. I haven't run Eagle yet, only seen the online demos, and it has some features specifically for PCB layout that makes life -much- easier. Don't get me wrong, there's nothing at all wrong with Express, just that Eagle is better on several points. (There's a 'small scale' freeware Version of Zuken/Racal-Redac Cadstar (don't know what the name is currently) that knocks the socks off those others but the additional features don't matter much to homegrown applications.) Clue (I just made this up) : "It's just design all the way down." [jb] There are a few ground rules and techniques. Anything else is based on 1) the exact application, and 2) experience. Final PCB layout starts with final product 'concept.' It proceeds through SCH and PCB. Do things right at the start and it'll be easier throughout. Do it ugly at the start and, well, you get the idea. It won't be physically ugly or 'wrong' but will be less easy to deal with on several levels. To start you need a fairly firm idea of what the final physical product will be. It has either a front and back panel if it's in a box, or various I/O points if it's just a raw PCB that connects to 'other things' inside a box or plugs into another PCB. It's easier to think about this up front, and follow through, rather than make changes at the final stage that have to be documented and referenced backwards through the process. Try to lay out your SCH so it -somewhat- corresponds with that final layout. Meaning that from left to right (usually) 'this...' conects with 'that...' conects with 'the other thing.' Of course the SCH -can't- look exactly like the final assembly because it's a 'logical' layout rather than a physical layout, but that 'sensible' logical layout can help make things easier later in the PCB, rework, debug, and troubleshooting stages. -Before- you start laying out the PCB you should know, with quite a bit of detail, the capabilities and preferences of the PCB fabricator. For instance, Express tells what pad and drill sizes are included in their standard packages. You should know the track size and spacing -limitations-of the fabricator, for a given price scale. For instance, to make a certain route you find you need to narrow a track and pad spacing, that -can- kick the whole silly board up into another price bracket. :( Know about that in advance and save yourself a lot of redesign later. Set those track/space limits into the PCB router and -adhere- to them, and use the DRC early and often. I don't know if Eagle can handle track/space specified at the SCH/signal level but if it does use it and again stick to it. As you load parts into the PCB you'll see that they make most -sense- to place things, roughly, as they appear in the SCH. This is where Eagle is really cool because it displays ratsnest connections (unrouted logical connections) on the screen and Express doesn't do that. (In Express you have to click on a net to see what pins are connected but can't, for instance, see all the connections in a given part at once.) The ratsnest lines will make sense, look shorter, as you place parts in a logical manner around the board. Place all parts initially on a 0.1 grid. It'll be easier to muck around with routing details later. -Always- route the most -critical- -signals- -first- That includes higher speed digital lines such as clocks, and sensitive analog lines, differentials, signals with parallel shield grounds and such. As seen by the -dashes- I can't emphasise that enough. Trying to route a sensitive/critical signal(s) through an already crowded layout can cause that signal to fail because oftoo many vias, too many corners, to close placement to other sensitive signals. Once the critical signals are done the rest doesn't matter much, just plop the rest in. Try to reduce vias/feedthroughs by watching the routing as it relates alll the way back to the original SCH. When 'these three lines from this gate' seem to want to cross over 'those three lines from another gate' the route can -very- often be simplified by swapping gates back at the SCH and reloading the netlist into the PCB. You can take that further and even swap individual pins on a given gate. --> A poor SCH can make a PCB difficult or even impossible to route due to poor gate selection. That's all called back annotation and I'm pretty sure I saw the Eagle demo demonstrating that which is why I recommend it over Express. In Express I had to edit the SCH, delete routes, reloud the netlist, and reroute the deleted routes. Not all -that- critical, but it saes some time, just easier. Autorouter optimisation/via minimisation is often only 'average' even under the high end software. Even after many optimisation passes I could usually pull a0%-20% vias out just by casually glancing at the layout. It takes time but adds reliability. Final clue, if the final product assembly looks like it's going to be a bit tight: While placing and routing, remember to watch things in -three- -dimensions-. For instance if a particularly tall cap happens to bump into a panel connector you'll end up manually laying the cap down so it fits -under- the connector = not pretty, and yucky to assemble. :) This is where a higher end PCB package that handles -lots- of layers comes in very handy by overlaying a case assembly drawing over a PCB drawing. Short answer: watch the PCB from start to finish as a process, not just a product. -- jim barchuk jb@jbarchuk.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads