pic microcontroller discussion list <> wrote on Thursday, March 13, 2003
2:10 PM:

> I've had success with 19531bps masquerading as 19200bps.
> 1.7% worked well

A typical UART looks for the rising edge of the start bit, then samples the
signal a couple of times around where the centre of each bit should be.
For example, it could look at 25%, 50% and 75% of the way through each bit.
That helps to get rid of glitches.

However it means that by the end of the byte (about 10 bit slots later),
the receivers guess of when the bit starts and stops has to be within 25%
of a bit period, so each bit can slip by 2.5% of a bit period.  For the
next byte, the UART will re-synchronise on the next start bit, so errors
aren't accumulated.

In other words, for the hypothetical UART described above, the clocks at
the receiver and transmitter have to be in agreement within 2.5%, so each
one needs to be within 1.25% of the correct value to make comms reliable.
Different UARTs use different sampling schemes, and could even
resynchronise during the byte (do any do this?), but assuming the clocks
have to be accurate to less than 1% is a good place to start.

If both clocks are 30ppm crystals, their maximum combined error at room
temperature is 0.06%, so you can get away with a bit rate error of 1.7%.
Add a significant temperature difference between the crystals (some of what
we do here has > 150 deg C between them!) and your 19531 might not work any
more :-)

Nigel
--
Nigel Orr, Design Engineer                 nigel@axoninstruments.co.uk
Axon Instruments Ltd., Wardes Road,Inverurie,Aberdeenshire,UK,AB51 3TT
               Tel:+44 1467 622332 Fax:+44 1467 625235
                   http://www.axoninstruments.co.uk

--
http://www.piclist.com hint: PICList Posts must start with ONE topic:
[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads