Olin Lathrop wrote:
...
> I've been following it too, but I've kept my mouth shut so=20
> far because I don't have any particular expertise in this area.

Better get some particular expertise in this area... wait,=20
I suspect you are just joking: almost all you've written=20
is a nonsense beginning with "cable DC resistance is=20
infinite" at "as high voltage as the cable and your analog=20
electronics can stand" and so on.

Cable DC resistance could vary tremendously, I think.

Mike.



> However, I just got this idea that doesn't require a fast micro nor
any
> comparator at all.  There may be some problems with this, but here
goes:
>=20
> The other end of the cable must be open (cable DC resistance is
infinite),
> and that the cable impedence is known.  Pull one lead of the cable to
as
> high a voltage as the cable and your analog electronics can stand via
a
> high value resistor, like 1Mohm.  The other cable lead is tied to
ground.
> A high speed opamp is set up as an integrator of the cable voltage.
Hold
> the integrator in reset (FET clamp probably) and wait for everything
to
> stabalize.  Then as simultaneously as possible release the integrator
and
> switch in a resistor accross the cable that matches its characteristic
> impedence.  Read the integrator value when you get around to it.  Its
> voltage will be directly proportional to cable length.
>=20
> THEORY OF OPERATION: Assuming a perfect impedence match with the
> resistor
> that is switched in, the cable voltage will drop half way to ground
before
> the reflection from the end comes back.  Once the reflection comes
back,
> the voltage should go to 0 and stay there indefinitely because this is
the
> steady state condition.  The length of time at the 1/2 voltage is the
> cable propagation time to the end and back.  The value on the
integrator
> will be proportional to this time, since the voltage is fixed.  Once
> steady state is reached, the input to the integrator is 0 and it will
> therefore hold its voltage.  Of course there will be leakage and
offset
> errors, so the integrator voltage will drift over time, but this is
much
> slower response than the cable.  You therefore should read the
integrator
> as quickly as possible after steady state, but a few microseconds more
> shouldn't make any difference.  It should be fine to initiate the
pulse
> from a PIC output, then wait the A/D acquisition time plus a few extra
> microseconds, then do a conversion.
>=20
> Of course you won't get the nice perfect 1/2 voltage pulse followed by
> steady 0, but integrating whatever you do get will probably still work
as
> long as the resistor matches the cable impedence reasonably well.
>=20

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