>>
Now this ram is located in side the 0x00-0x7F access data range and
hence the compiler/linker should not use the BSR register for access.

But looking at the output is does, this code:

        CLRF    Temp     ;
        CLRF    Temp+1   ;
        CLRF    Temp+2   ;

generates:

6B7A    : CLRF  0x7A,0x1
6B7B    : CLRF  0x7B,0x1
6B7C    : CLRF  0x7C,0x1
<<

Hmm.  I'm a bit surprised by this too.  The linker does set the accessbank
bit properly for me on references to accessbank variables, but I haven't
tried it with overlays.  I noticed that you defined the linker section
with DATABANK instead of ACCESSBANK as I do, although I've never tried to
allocate UDATA_SHR memory in teh ACCESSBANK linker section.

For what it's worth, here is my linker control file for the 18F452:


//   Linker control file for the PIC 18F452 processor.
//
CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED //processor
config words
CODEPAGE NAME=idlocs START=0x200000 END=0X200007 PROTECTED //ID words
CODEPAGE NAME=eedata START=0xF00000 END=0xF000FF PROTECTED //Initial
EEPROM data

CODEPAGE NAME=code0 START=0 END=0x7FFF //program memory

ACCESSBANK NAME=accessram START=0x0  END=0x7F PROTECTED //RAM part of
access bank

DATABANK NAME=bank0 START=0x080 END=0x0FF //register bank 0
DATABANK NAME=bank1 START=0x100 END=0x1FF //register bank 1
DATABANK NAME=bank2 START=0x200 END=0x2FF //register bank 2
DATABANK NAME=bank3 START=0x300 END=0x3FF //register bank 3
DATABANK NAME=bank4 START=0x400 END=0x4FF //register bank 4
DATABANK NAME=bank5 START=0x500 END=0x5FF //register bank 5

SECTION NAME=.udata_acs RAM=accessram //bank 0 part of the access bank
SECTION NAME=.BANK0 RAM=bank0 //for registers explicitly in bank 0
SECTION NAME=.BANK1 RAM=bank1 //for registers explicitly in bank 1
SECTION NAME=.BANK2 RAM=bank2 //for registers explicitly in bank 2
SECTION NAME=.BANK3 RAM=bank3 //for registers explicitly in bank 3
SECTION NAME=.BANK4 RAM=bank4 //for registers explicitly in bank 4
SECTION NAME=.BANK5 RAM=bank5 //for registers explicitly in bank 5


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