What about this one chip solution:

http://www.myke.com/lcd.htm


On 15 Feb 2003 at 16:05, WH Tan wrote:

> Hi, it take long time for me to have a chance to test your circuit.
>
> Please refer to new version of schematic at
> http://www.angelfire.com/electronic2/pic2/index.htm. Anyway there are some
> mistakes and following are the correction.
>
> 1) IC1 should be 74HC123 instead of 74HC221.
> 2) For the waveform at the bottom, the 'RESET' part is unnecessary. During
> making of the drawing, I thought it was necessary. But when I was writing
> the code, I realise it is not.
> 3) More appropriate value for R2 should be 15k, although I have not change
> my test circuit yet.
>
> I think I have a problem with the E clock. Please look at the waveforms I
> attach. CH1 is data, CH2 is pin 12 of IC2, CH3 is pin 4 of IC2, CH4 is E
> clock which is pin 6 of LCD.
>
> The level of E clock seem to be not enough. Should I use a transistor to
> correct it? Or if there a better way, for example difference value of C3 and
> R3.
>
> Waveform A: R3 = 10k-ohm, C3 = 0.01uF
> Waveform B: R3 = 1k-ohm, C3 = 0.1uF
>
> Thanks & regards.
>
>
> WH Tan
>
> > -----Original Message-----
> > From: pic microcontroller discussion list
> > [mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of Bob Ammerman
> > Sent: 01 February 2003 04:11
> > To: PICLIST@MITVMA.MIT.EDU
> > Subject: Re: [PIC]: [EE]: 1 I/O interface to LCD - 2 chip solution
> >
> >
> > Attached is schematic for a two chip solution to the problem.
> >
> > Unlike the original circuit, it is based on using the 4-bit interface mode
> > on the LCD.
> >
> > Theory of operation:
> >
> > Given that the pulse width of IC1A is 'Ta' and that of IC1B is 'Tb', which
> > is 2 * Ta or more.
> >
> > Then:
> >
> > A zero bit is written by sending HI for 1/2Ta, followed by LO for 3/2Ta
> > A one bit is written by sending HI for  3/2Ta, followed by LO for 1/2Ta
> >
> > The end of the data is indicated by sending leaving the line low for at
> > least as long as Tb
> >
> > Sending a word of data to the LCD is as follows:
> >
> > Send the desired value for the R/S bit
> > Send the desired value for D7
> > Send the desired value for D6
> > Send the desired value for D5
> > Send the desired value for D4
> >
> > Set the line HI to Tb + some amount of time to mark the end
> >
> > The circuit will respond as follows:
> >
> > At the rising edge of the single for the R/S bit both IC1A and IC1B will
> > start generating a pulse. When IC1B times out it will clock the current
> > state of the input line into IC2.
> >
> > The falling edge of /Q from IC1A will try to force 'E' below
> > ground, but D1
> > will clip that.
> >
> > At the rising edge of each additional bit IC1B will generate a new pulse,
> > but IC1A will just extend the current pulse (because it is retriggerable).
> >
> > Finally when the input line hasn't seen a LO to HI transition for Tb, IC1A
> > will timeout. The /Q signal will go hi, forcing E high thru C1. The time
> > constant of R1 and C1 will determine the length of the enable pulse.
> >
> > Bob Ammerman
> > RAm Systems
> >
> > --
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> >
> >
> >
>
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