> I have just spend all night getting my Tmr0 interrupt working properly -
a
> few gotcha's with saving the context and resetting PCLATH got it working
> finally !  It took me a while to realise that if I am using more than
one
> code page on the PIC, and my ISR sits in the first code page, the call
to
> the ISR on Tmr0 overflow does NOT set PCLATH to the code page of the
ISR -
> so if you do not set it yourself at the start of the ISR after saving
the
> context, and you have call's or goto's in your ISR - your in trouble !

Yup, and more trouble if you don't save PCLATH before clobbering it in the
ISR and not restore it before returning.

I've got a template interrupt routine that automatically inserts the
appropriate PCLATH code depending on whether the particular PIC has more
than one code page or not.  Take a look at the QQQ_INTR.ASPIC module at
http://www.embedinc.com/pic.


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(978) 742-9014, http://www.embedinc.com

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