At 04:28 PM 2/4/2003 -0500, you wrote:
>I have a design that utilizes a C57C that reads an eeprom (93LC46A)  on
>power up.  Everything works correctly, it is very simple bit bang
>communication.
>
>When employing a plain old C57, the processor does not get its operating
>data from the eeprom correctly.  When watching the DO pin of the eeprom,
>it passes the correct data to the C57 properly sync'd with the clock
>pulses.   However the processor is not reading it correctly (based upon
>viewing improper operation).  I am only passing on 5 addresses, so I could
>easily watch the entire communication and view the correct data clocking
>out of the eeprom.
>
>Here is the weird part:  When I reset the processor, it reads the eeprom
>and gets the data correct!
>
>Power supply comes up in less than 40us (0 to 5V), and we wait 500ms
>before accessing eeprom.  I did try holding the processor in reset for
>several seconds (thinking the eeprom needed more time for some reason to
>stabilize) but this also did not work.  First read is wrong (3 addresses
>appear to be read OK, last 2 are wrong).  Resetting the processor again
>causes it to read the proper data.  I do have a voltage detector handling
>processor reset.
>
>What is really odd is that I can view the datastream heading to the
>processor, so I know the eeprom was initialized correctly and has clocked
>out correct data for the 5 addresses.  The processor simply clocks this
>data into registers and uses them to set up power level,  carrier
>frequencies and modulations.  3 addresses are interpreted correctly, 2 are
>not.  Put the same code into a C57C and it works the way the code says it
>should.  So... I figure I am missing something in migration.
>
>
>I have reviewed all the migration notes between the C57 and C57C (all
>pretty simple), and have never run into an issue like this before.
>
>All eeprom communication is text book and well within timing requirements
>(no need for speed).


Do you hold /CS high for the 500ms before attempting to access the EEPROM?

Are the clock and data pins in the same state at the point where /CS goes
low?

Are you sure there is no issue with the ORG input on some 93xx46's -
these parts vary SIGNIFICANTLY from manufacturer to manufacturer.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

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