I received a reply from Microchip to my request for clarification on the =
"certain conditions' mentioned in the 18F452 B3 errata sheet, issues 5 =
and 6 (the 0x4000 boundary problem).=20

Response summary;

The behavior exists for particular code sequences at a =
voltage/frequency/temperature point and the point depends on the =
particular silicon lot. Test a sample set of each lot to see if you =
experience the problem over your intended range of use.

The next revision of the silicon (C0) fixes all of the B3 Issues and =
will be available in a few months. An interim fix for the 'panel =
boundary' erratum (I presume this means the 0x4000 problem) will be =
available sooner.

Mike Jones




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