Maybe MSP430x16x:

"The MSP430x16x devices have a 3-channel DMA controller.=20
The DMA controller is used to transfer data from one location=20
to another without the CPU ... This allows for moving data from=20
peripherals to RAM, RAM to peripherals, peripheral-to-peripheral,=20
etc., completely without CPU intervention."=20

   Mike.

Kyrre Aalerud wrote:
>=20
> I'm talking of using a special trick where the content for the
data-packet's
> are delivered directly to the USB2.0 interface by the ADC via a double
> banked, buffering at higher clock-speed, clocking data from buffer to
> transmitter faster than it wil arrive in other buffer.  This would
allow for
> real-time "packaging" of data for USB2.0 bus.
>=20
> Yes I know it's sneaky but it will work.
>=20
> With proper shielding and a good layout this should be possible in a
rather
> small package.
> Worst case scinario is that I implement the buffer ini a FPGA so that
I can
> test different solutions.
>=20
> I want to be able to look at and capture signals in the 4-5 MHz band
at
> most.  Not necessarily at 16 bit, here I agree that temporal
resolution is
> more important because it will mean doubling the number of samples pr
cycle.
> Besides, capacitance in my design is likely to distort signals so much
that
> the extra resolution won't show any real information anyways...
>=20
> What I do need is info on different chips so I can find one that won't
ruin
> me and still give me some power.

--
http://www.piclist.com hint: The PICList is archived three different
ways.  See http://www.piclist.com/#archives for details.