Fixed! you mentioned test for write completion, so I stuck one in there
(except I tested the WR bit). I guess that was the problem... and the bankx
macros are a good idea, I will use them! Thanks.

Quoting Jinx <joecolquitt@CLEAR.NET.NZ>:

> These are the routines I use for EEPROM w/r. They're pretty
> similar to yours but notice that the write routine has a write
> completion test (possible problem ?). In some programs I use
> both EEPROM and FLASH so eepgd is explicitly set
>
> eewrite
>
>          bank2
>          movwf  eedata        ;data from W
>
>          bank0
>          movf   eea,w         ;address from bank0 RAM
>          bank2
>          movwf  eeadr
>
>          bank3
>          bcf    eecon1,eepgd  ;select EEPROM memory
>          bsf    eecon1,wren   ;initiate write
>          movlw  0x55
>          movwf  eecon2
>          movlw  0xaa
>          movwf  eecon2
>          bsf    eecon1,wr
>
>          bank0
>          btfss  pir2,eeif     ;wait for write completion
>          goto   $-1
>          bcf    pir2,eeif
>          return
>
> eeread
>
>          bank0
>          movf   eea,w         ;address
>          bank2
>          movwf  eeadr
>          bank3
>          bcf    eecon1,eepgd
>          bsf    eecon1,rd
>          bank2
>          movf   eedata,w      ;data
>          bank0
>          return
>
> Pet hate - status,rpx instructions. They really clutter up code and
> can lead to incorrect bank switching. Try these macros, or Olin's
> bank selection routines
>
> bank0 macro
>          bcf     status,rp0
>          bcf     status,rp1
>          bcf     status,irp
>          endm
>
> bank1   macro
>          bsf     status,rp0
>          bcf     status,rp1
>          bcf     status,irp
>          endm
>
> bank2   macro
>          bcf     status,rp0
>          bsf     status,rp1
>          bcf     status,irp
>          endm
>
> bank3   macro
>          bsf     status,rp0
>          bsf     status,rp1
>          bcf     status,irp
>          endm
>
> --
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>




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